1. Field of the Invention
This invention relates to a semiconductor device having a plurality of semiconductor chips. More particularly, this invention relates to a semiconductor device having one semiconductor chip stacked thereon with another semiconductor chip so that they are connected together, thereby increasing the integration density.
2. Description of the Prior Art
There is one example of this kind of a conventional semiconductor device disclosed by Japanese Laying-Open Patent Publication No. H6-112402 [H01L25/065, 07, 18] assigned to the same assignee as this invention was assigned to. This prior art includes two IC chips each having bumps formed at a periphery of a connecting surface so that the two IC chips are connected together. These both IC chips are further transfer-molded into a mold or package.
In this prior art, however, the bumps are placed only at the periphery of the IC chip, involving a problem as stated below. That is, no bumps are provided at a central area of the IC chips so that a gap might occur between the central areas of the two IC chips. This results in warping in at least one of the two IC chips in a manner of nearing two IC chips together. Accordingly, there arises a problem that the circuit elements formed in the connection surface undergo damage due to nearing the two IC chips, besides the warped IC chip surface suffers from cracks. This tendency becomes prominent as the area of the IC chips increases.